Title of Paper: Reconfigurable Data Path Processor for Spacecraft
Instruments
Principal Author: Gregory W. Donohoe
Abstract: The Reconfigurable
Data Path Processor (RDPP) is an ultra-low-power, radiation-tolerant,
monolithic multiprocessor under development by GSFC and the Institute for
Advanced Microelectronics at the University of New Mexico for data-intensive
spacecraft instrument data processing. The RDPP implements a synchronous
computational pipeline, employing a novel dynamic data switching technique to
achieve high throughput and flexibility with a reconfigurable data path.
The RDPP employs 16 configurable
processing elements connected by a hierarchical interconnection network.
High-performance sequential processors and digital signal processors achieve
high throughput with fast clock speeds, cache memory, and instruction
pipelining, while field-programmable gate arrays gain high speed with parallel
data paths. These techniques exact high price in power consumption, however,
and are difficult to make radiation tolerant. The RDPP falls between the
fine-grained configurability of FPGAs and the coarse-grained sequential processors.
Designed for the ultra-low-power, radiation tolerant CMOS technology developed
at the Institute for Advanced Microelectronics, it is anticipated that the RDPP
will achieve a throughput of 50 MSamples/sec on image and signal processing
applications with two orders of magnitude less power consumption than
conventional processors.
RDPP program is developing an
extensive set of software tools to make it designer-friendly. The synchronous
data flow model of the RDPP is familiar to users of application development
tools such as Matlab/Simulink, and the RDPP software is designed to integrate
smoothly with such environments. The RDPP software suite will include tools for
converting floating point data representations to fixed point with minimum loss
of precision, as well as an application compiler and a simulator.
The paper presents an overview of the Reconfigurable Data Path Processor, including the architecture, hardware development, and software, along with preliminary performance estimates.