Title of Paper: Design of a Radiation-Tolerant Low-Power Transceiver
Principal Author: Mr. Daniel Weigand
Abstract: Over the last three years, ITT and NASA have been developing the Low Power Transceiver (LPT). The LPT is a compact, flexible device that can be configured to perform custom communications and navigation functions in terrestrial, airborne and space applications. Composed of multiple PC/104 modules, the LPT assembly is modular in nature and therefore suitable for implementing a wide variety of integrated functions (e.g., numerous simultaneous software receiver and transmitter channels over multiple frequency bands). Additionally, the use of industry standard PC/104 modules allows the LPT to host application-specific and COTS modules for components such as processors and interfaces.
The inherent flexibility and capability of the LPT are demonstrated by a current LPT configuration that integrates the functions of communications, using NASA’s Space (TDRSS) and Ground Networks (STDN) for TT&C and science data relay, and navigation, using GPS. This specific capability will be demonstrated in orbit on an upcoming Shuttle flight (STS-107). The experiment will demonstrate simultaneous communications and autonomous navigation capabilities on orbit—critical requirements for both Space-Based Range Safety and Formation Flying applications.
Currently, ITT and NASA are working towards developing a radiation-tolerant LPT (rLPT) that has all the functionality and reprogrammability of the current LPT with the ability to operate reliably in the space radiation environment. The Earth Science Technology Office (ESTO) is funding research through the Advanced Information Systems Technology (AIST) program to design and develop the radiation-tolerant LPT digital module. This effort poses several design challenges, because it requires the hardening of the digital module’s FPGA and DSP devices, which perform the LPT’s advanced signal processing functions. Developing a fault-tolerant architecture for the SRAM-based reprogrammable FPGAs to mitigate single-event upsets (SEUs) is a key element of this effort. The resulting digital module will be tested in a radiation test facility and will be stacked with other radiation-tolerant modules to form the rLPT.